The Architecture Move
Most programmable fabrics hide reconfiguration behind tooling, a bitstream file, or a global controller. Cartilage pushes that activity into the spatial model. A region has a boundary. Configuration enters through a local port. The child region receives new body roles. The parent relationship remains visible while the fabric changes.
That is why this demo matters even before the later checked runs. It shows a computational surface where ownership and reconfiguration are not documentation pasted onto the side; they are part of the machine being rendered.
The Live Artifact
The preserved public artifact is a standalone WebGL page. It remains the primary live demo of the 2021 lineage, where series of MUX tile blocks are instantiated in a nested manner from a left-edge reconfiguration port area by streaming SPI-like configuration bits.
Current implementationCartilage Core publishes the compact current mechanism.
The public source repository contains a single-file WebGL1 model, hardware paper, local-clocked SystemVerilog RTL, and Verilator testbench for an exact 252-bit 6x6 AND installation.
Lineage: that repository is derived from the child-owned-port line; it is not the source tree for this preserved 2021 demo.
Tile Roles
The code identifies the model as MUX VLSI Boolean logic cellular automata. Each cell has compact configuration state for orientation, mode, parent pointer, current state, and a configuration shift register.
- Mode 1: wire.
- Modes 2 through 7: MUX behavior.
- Special orientation 0: reconfiguration port.
- Special orientation 1: cross/intersection.
- Special orientation 2: GND.
- Special orientation 3: PWR.
Reading The Fabric Render
The render has three layers that should not be collapsed into one idea: the installed body role, the runtime signal state, and the human publication callouts.
The installed body role is the important one. Each visible cell has a body-role code made from two orientation bits and three mode bits: orientation + 4 * mode. That gives 32 renderable cell roles.
Mode 0 is special: orientation 0 is the local reconfiguration port, orientation 1 is the cross/intersection role, orientation 2 is constant zero, and orientation 3 is constant one. Mode 1 is a wire in four orientations. Modes 2 through 7 are the six MUX behaviors, again in four orientations each.
The point of this alphabet is that the same fabric can be rewritten locally. A configuration stream entering a reconfiguration port does not paint an annotation onto the picture; it replaces the child region's actual body roles: ports, crosses, constants, wires, and MUXes.
What The Marks Mean
- Purple port: local configuration ingress for a bounded child region.
- Cross: route-intersection primitive, not a four-way MUX.
- Const 0 / Const 1: local fixed low and high sources.
- Wire: one-input pass-through route in one of four orientations.
- MUX: local selector tile. The mode chooses the data-input pair; the orientation rotates the installed role in the drawing.
- Black and white discs/stubs: rendered runtime state on top of the installed body role.
- Text labels and colored callouts: publication overlays for the reader, not additional machine state.
In the nested-instantiation demo, the left-edge reconfiguration area is not an external global controller. It is the visible place where configuration enters a region through a port side. Once the child region is filled, the installed roles inside that region are ordinary fabric roles again: wires, crosses, constants, MUXes, and possibly more reconfiguration ports.
Concrete Render Examples
These renders use the same visual vocabulary at different scales. The 2021 demo is the live artifact; the newer renders below are easier stills for reading ports, roles, and configured routes.
In the port-root render, the square ownership block and port root are separate facts: the port is a body role, while the parent pointers define the child region. In the ripple-adder render, the same vocabulary becomes a configured datapath: lanes, MUX islands, constants, crosses, and edge outputs can be read without inventing a second visual language.
Configuration Stream
The implementation contains an 8-bit core configuration block and an 8-bit shift register for new configuration data. The new configuration bits are applied to the main tile-role bits when the subtree has been filled with configuration bits.
The configuration stream is clocked from an input into the subtree's reconfiguration port at its root. A completion flip-flop marks when the new configuration bits have been collected.
Why Local Ports Matter
The point is that reconfiguration enters through local ports. The region being configured is bounded, and the parent/daughter relationship is explicit in the cell state. FPGA and EDA readers should read this as a routing and configuration discipline.
The parent pointer creates an ownership tree. Reconfiguration ports are tile roles inside the same fabric, not outside holes in the model. That is the difference between a visual cellular automaton and a composable reconfigurable substrate.
Relation To Boolean Algebra
The Boolean paper explains why wires, constants, MUXes, feedback, configuration, and tiling are enough as a universal substrate. Cartilage is a live artifact in that direction: it shows tiles being assigned roles and reconfigured locally in a visible browser/GPU model.
Controls In The Artifact
The demo source includes editing controls: ASDW to draw wires while pressing the mouse, ZQERTYU to place multiplexers, backtick for ground, 1 for power, X for intersection, L for reconfiguration port, and numpad 4-8-6-2 to change the parent pointer in the ownership tree.
Those controls exist because this was built as an editable fabric, not a movie of a fabric. The main delivered behavior is local nested instantiation.
Cartilage Visual Language
The 32 Cartilage cell-role codes are a compact body-type alphabet: reconfiguration port, cross, constants, four wire orientations, and six MUX modes in four orientations. The Cartilage Visual Language article shows the rendered key and decodes all 32 codes.
Where It Sits In The Program
The 2021 demo is the canonical live Cartilage artifact. Later pages add checked packaging, QFG drivers, exact-frame captures, and current render milestones. This one matters because it shows the original nested-instantiation behavior directly in the browser.
Child-owned port roots
Configured circuit roles