FPGAs, Claytronics, and Reactive Programming
March 22, 2023

Parallel-computing noteOriginally posted 2023-03-22; rewritten here around FPGA education and scalable reactive systems.

Included: FPGA teaching, placed computation, programmable matter, timing, locality, and why many-resource systems need a different programming model.

The Teaching Gap

FPGAs teach an important lesson that ordinary software can hide: computation has placement, timing, routing, fanout, resource limits, and physical cost. That lesson matters far beyond one chip family.

Students who only see CPUs and high-level software may learn parallelism as a library or cloud deployment problem. Placed computation makes the harder parts visible earlier: where state lives, when a value is valid, how far a signal travels, and what owns a boundary.

Why Programmable Matter Raises the Same Question

Claytronics and other programmable-matter ideas multiply the same issue. The system is many local resources acting together, not one abstract worker pool. The programming model has to preserve locality, ownership, timing, failure, and communication while the whole structure changes. The wafer-diced chiplet proposal asks how those local resources might become manufacturable physical parts.

That is why reactive programming belongs in the discussion. The hard part is not only dispatching work. The hard part is keeping many state changes understandable while they happen in place.

Useful Scope

The practical point is narrower and more useful: parallel systems become easier to reason about when the machine is not hidden. The original post linked Scott Hauck's FPGA teaching material at people.ece.uw.edu/hauck/publications/CompArchOnFPGA.PDF.