I design and build computational mechanisms when the usual stack hides the part that matters.
The work runs through FPGA fabrics, one-pin radio, browser-native GPU computation, learning systems, semiconductor process hypotheses, magnetic circuits, and active-device research. The common move is reconstruction: find the primitive that must exist, build a runnable version, and keep the evidence close enough that another technical reader can inspect it.
I am looking for serious R&D conversations: funded prototype work, research architecture roles, product-development work, fabrication access, institutional support, and collaborators who can help move the larger mechanisms from public artifacts into stronger machines.
Work with Brian | Strongest demonstrations | Maker fab | Cartilage | Contact
Bring a hard technical boundary, not a polished pitch.
Good fits include a computation trapped behind a black box, a hardware/software boundary that is too expensive or opaque, an FPGA or reconfigurable-computing architecture that needs to become concrete, a signal path that may be simpler than the standard stack, or a fabrication/process idea that needs an engineer who can reason from physics back to runnable machinery.
Useful opportunities: funded R&D, product architecture, prototype implementation, technical due diligence, collaboration with FPGA, semiconductor, radio, or reconfigurable-computing teams, access to fabrication or labs, and an institutional home for the Cartilage and active-device program.
The maker loop can reach the board, enclosure, firmware, and fixture. Then it hits active silicon and stops.
This article names the missing civic-scale process: local fast nonlinear gain, restoration, fanout, interconnect, and enough repeatability for useful logic. It is the material bottleneck behind the rest of the site.
Cartilage is my long-running architecture program for a computational fabric where ownership, routing, configuration, and local state are visible inside the machine rather than hidden behind a global runtime.
The current package publishes the compact WebGL1 fabric, architecture paper, local-clocked SystemVerilog RTL, and Verilator testbench. One checked 6x6 image receives 252 payload bits plus one apply pulse and settles to an interior-MUX AND circuit.
Inspect the public source repository
Radio is an inherited stack of analog front ends, mixers, ADCs, filters, oscillators, and digital processing habits. I wanted to know which parts were necessary.
The page preserves a one-pin FPGA receiver and a one-pin resonant-tank transmitter chain, including the Verilog follow-up, operating evidence, and limits.
A homogeneous fabric uses Boolean state and switching for application logic, ownership, configuration transport, timing, and recursive circuit replacement.
The revised construction makes the finite transaction protocol, causal timing contract, Turing-equivalence premises, and browser implementation boundary explicit.
Cartilage is not only an FPGA-style demo. It is an attempt to replace the hidden runtime with a spatial fabric where regions own their ports, carry configuration through explicit boundaries, and keep data movement readable.
The current inspectable mechanism separates the browser simulation from the RTL application plane and local configuration clocks. The package includes the source, design paper, testbench, exact install, and explicit non-claims.
A fabric is easier to evaluate when its marks can be read.
This decoder preserves the 32 Cartilage cell-role codes: reconfiguration port, cross, constants, wire orientations, and the six MUX modes in four orientations.
Reconfiguration should not arrive through a hidden global controller. Regions should own and replace daughter regions through visible local ports.
This browser/GPU demo shows tiled regions, local configuration streams, and nested replacement behavior in the canonical Cartilage artifact.
Ownership became visible enough to show square child regions and active port roots inside a running fabric.
This preserved self-contained WebGL/GPGPU milestone keeps the 6x6 ownership block work and active port-root initialization fixes in the visual lineage.
The older WebGL automata show computation moving through local rules before the fabric became circuit-like.
This series keeps the reversible-routing, machine-like, organic, and Cartilage-branch browser/GPU experiments that led into the current fabric work.
Serial is not automatically inferior when the schedule remains full.
This positive-number Logisim multiplier keeps bit-serial arguments and products moving continuously after the pipeline fills, trading wide immediate products for regular local timing.
The artifact keeps the architecture, tokenizer, command, loss log, generated samples, and source path together.
It preserves 4 layers, 16 attention heads, 128-dimensional embeddings, 128-token context, a 361-token vocabulary, about 834k parameters, and training past 50,000 iterations until the model produced intelligible story-like samples.
A self-contained Python scanline renderer uses UV-space 2D SDF material tests, point-cloud foliage speckles, triangle trunks and branches, and a UV-SDF deer sprite to make a forest scene without ordinary bitmap texture art.
The article keeps the generated frame, source-code PDF, row-fill algorithm, UV-SDF material path, procedural scene geometry, and original post links together so the image can be read as renderer output.
The generated Cartilage pages are grouped by use: checked runs, recorded timelines, visual placement sketches, source artifacts, and current reading paths.
A guide to the current core plus the older checked runs, recorded timelines, visual placement sketches, source artifacts, and debug fixture.
Early control, switching, visible state, and browser-native experimentation.
The sequence collects scaffolding, minimum WebGL, history/control, logic, addition, and other early steps in the computation path.
Local-rule WebGL automata exploring reversible routing, conservation, machine-like behavior, organic patterns, and the Cartilage branch.
A dated trail of thoughts rescued from the feed: technical arguments, collaboration requests, and invention fragments.
Read it as a library of standalone article pages.
Older project-status writing from web-development and research-progress work, kept with dated context.
Some article drafts use machine assistance, but the published page still has to carry the source, result, scope, and responsibility for the claim.
Magnetics: can useful circuit behavior escape semiconductor fabrication? The notes gather magnetic material properties, magnetic amplifier behavior, second-harmonic modulation, and diodeless circuit ideas while keeping feasibility questions open.
Backprop: can learning be wired from primitive operations so the gradients remain visible? The thread is about multiplication, addition, fan-out, elementary functions, and derivative feedback as inspectable machinery.
Fabrication: can active or semi-active substrates become physically reproducible at civic scale? This note connects through-wafer dicing, SiO2-protected chiplets, near-field power/clock/data links, resonant distributed energy storage, and Cartilage-style spatial computation to the old Claytronics problem.
The PDF remains the manufacturing reference. The local article explains why that reference belongs on Greenforest I/O and where the open boundary still is.
For search clarity: Greenforest I/O is not forestry, landscaping, arborist, or forest-product services.
Greenforest I/O is the public work site of Brian Greenforest, connected to Solid State Pros LLC for emerging-technology R&D and product-design work.
Legal entity: Solid State Pros LLC. Email: brian@solidstatepros.com.
Contact Greenforest I/O, inspect artifacts and evidence, visit Solid State Pros LLC, or read the brand/entity page if you arrived here looking for the official Greenforest result.
