How Much Radio Do You Actually Need?
Brian Greenforest | April 22, 2026

A radio receiver usually arrives as an inherited stack: analog front end, local oscillator, mixer, ADC, then a pile of DSP. People do not meet "radio" as a small mechanism. They meet it as a tradition.

That tradition works. It also hides the real question:

How much of that stack does radio actually need?

Not "how little of an FM receiver can I get away with" in the narrow hobby sense. The bigger question is broader and more serious: when you strip radio down until only the governing causes remain, what still stands? What belongs to radio itself, and what belongs only to the standard industrial answer?

I went after that question with FM because FM gives you a hard test. It is a real broadcast signal, it carries phase and frequency information continuously, and it punishes fake simplifications quickly. If a brutally reduced receiver can still recover real FM cleanly, then at least some of the inherited bulk was never fundamental.

So I forced the design into a corner:

one input pin, one FPGA, real FM in, real sound out.

That is not a slogan. It is a way to make the argument answerable to hardware.

Waveforms, radio hardware prototype, and received spectrum
Waveforms, prototype hardware, and received RF structure from the one-pin radio work.

The Usual Receiver Spends a Lot of Its Energy Fighting Itself

I started where people usually start. Weak RF comes in. A low-noise amplifier boosts it. A mixer multiplies it against a local oscillator. The design produces IF or baseband. An ADC samples that. DSP cleans up the rest.

Then the architecture starts charging rent.

The local oscillator has to be strong. Once it gets strong, it leaks into everything. It radiates. It pollutes the board. The receiver stops being a clean signal-recovery problem and turns into a containment problem for the machinery you introduced to solve it.

Then comes the ADC. It wants clean analog amplitude. It wants drive. It wants the front end to preserve explicit values faithfully enough that the digital chain can recover what the analog chain made expensive. Then the DSP arrives with lookup tables, multipliers, trigonometric mixing, atan2 phase extraction, and the usual overhead people treat as normal.

That whole stack works. I do not deny that. I just do not grant that it is essential.

So I cut the first burden out:

I hid the local oscillator action inside the FPGA.

That removed the loudest periodic signal from the outside world. It also forced the next question.

If I do not preserve analog amplitude with a conventional mixer-plus-ADC chain, what exactly do I preserve instead?

I Stopped Trying to Digitize Amplitude

The answer was not "a cheaper ADC." The answer was: stop treating amplitude as the thing that must survive first.

I let the FPGA input threshold the incoming RF around its midpoint.

When the signal crosses that midpoint, the pin sees a zero or a one.

That is the entire front edge of the receiver.

No multi-bit sample word. No explicit analog amplitude at the pin. Just transitions.

At first that sounds destructive. It is not. It only sounds destructive if you assume the only serious way to represent analog structure is to preserve an explicit sampled value at every step. I did not believe that.

The signal still lives in the crossings. Their timing matters. Their density matters. Their pattern matters. FM, especially, makes that plausible immediately, because the information lives in changing instantaneous frequency, and frequency shows up directly in crossing timing.

So the first real reduction was this:

RF in, transition stream out.

That move killed a huge amount of inherited baggage in one shot.

I Did Not Get That Idea from Radio

That threshold idea came from somewhere else.

About a year and a half before this receiver, I was training neural networks to discover digital circuit layouts on multiplexer-based fabrics using backpropagation. Digital logic is brutally nonlinear, so people do not normally expect those systems to train well. But I found one trick that helped a lot: I introduced a 50-50 noise process that generated zeros and ones statistically at the weight generator. Once that noise was there, simple circuits, adders for example, became much more trainable.

That left me with a useful lesson:

information can survive as binary stochastic structure.

It does not always need to survive as a clean explicit value.

I was also studying sigma-delta ADCs and DACs around that time. I had their waveforms and oscillograms printed out and kept staring at them. Sigma-delta teaches a similar lesson from another angle: a smooth analog signal can live inside a digital pulse stream far more efficiently than people assume. You do not need an explicit analog word every time you touch the signal. Transitions can carry much more structure than the ordinary sampled-amplitude mindset admits.

That did not mean I wanted a sigma-delta RF front end. In a real sigma-delta converter, the digital output feeds back into the analog side and shifts the midpoint dynamically. That feedback creates the very kind of pulsing front-end activity I was trying to avoid. I had already removed the strong external local oscillator. I did not want to solve that problem and then recreate it in another form.

So I kept the insight and rejected the architecture.

The insight said:

the one-pin input is not starved of information. It is rich in transitions.

That was enough.

The Pin Carries a Lot More Than People Think

Once I thresholded the RF at the FPGA input, I stopped asking for explicit amplitude and started asking for crossings.

That turns out to be enough.

When the signal crosses the midpoint frequently, the bitstream reflects that. When it stops crossing for a while, the state naturally resets and the process starts fresh. Over time, the crossing pattern still carries the structure of the original signal. The amplitude does not vanish. It reappears statistically.

That is why I could recover linear internal I and Q. The I/Q plots I show are not decorative. They are the proof. I can generate a sawtooth in the transmitter, send it over RF, receive it through one pin, and recover clean linear I and Q internally. So the thresholded representation does not merely "detect radio." It preserves signal structure well enough to reconstruct it.

That is the core bet of the whole design, and the plots show that the bet was right.

Four-Phase Sampling Gives Me the Signal Back

Inside the FPGA, I sample the thresholded bitstream in four phases.

That matters. I do not just oversample more and hope for the best. I sample in quadrature, with 90-degree offsets, so I preserve direct and quadrature structure explicitly. In effect, I sample at 2F in quadrature: two samples per carrier cycle, but with the quadrature timing preserved. Those four phases carry the full signal content I need.

That gives me:

Once I have that, the rest of the receiver simplifies aggressively.

I Do Not Multiply by Sines and Cosines

Standard digital radio culture reaches immediately for trigonometric machinery: sine tables, cosine tables, multipliers, explicit oscillators, all the ritual.

I do not need any of that here.

The signal is already in thresholded quadrature form. My digital Weaver stage just flips bits in the right pattern. In practice, that means XOR operations, controlled inversion of the ones-and-zeros stream. That is enough to perform the mixing and frequency translation I need.

So the digital mixing stage becomes logic, not trigonometric ceremony.

That cut matters because it keeps the receiver aligned with the representation I actually have, instead of dragging in a whole math culture that belongs to a different design assumption.

I Do Not Use atan2 Either

The usual FM-demodulation answer is to recover explicit phase with atan2 and then differentiate it. That is expensive. It also never matched how I was already thinking.

I had been working on a DQPSK demodulator, and that had already trained me to think in relative phase change between successive I/Q vectors, not in absolute phase extraction.

So when I reached post-CIC baseband I and Q in this receiver, I went straight to the geometric relation that mattered:

I_cur Q_prev - I_prev Q_cur

That is the 2D cross product of successive I/Q vectors.

For small phase steps, it already gives the relative rotation directly. FM only needs that rotation. So instead of computing atan2, then differentiating, then carrying all that arithmetic around, I just compute the cross product.

Two multiplications. One subtraction. Done.

That stage fits the rest of the receiver perfectly. The whole design keeps rejecting inherited heaviness in favor of the direct governing relation.

The Rest of the Chain Is Simple

A CIC filter downsamples the oversampled quadrature signal. That keeps the rate conversion cheap and structurally appropriate.

Then the cross-product demodulator recovers the FM baseband.

Then a sigma-delta output stage turns the recovered signal into audio that can drive a speaker.

So the full chain is this:

That is the receiver.

What I Removed

I removed the parts people normally assume are untouchable:

I did not remove them out of ideology. I removed them because the receiver still stood without them.

That is the whole point of the project.

A serious hardware project does more than prove that something works. It shows what can disappear without breaking the thing.

Why This Receiver Matters

This is not about making radio "simpler" in some shallow sense. I am not interested in toy simplifications. I care about the smallest set of causes that must remain so the real thing still stands.

That is what this receiver exposed.

It showed that a lot of the inherited bulk around FM reception belongs to the standard answer, not to the essence of the task. Once you see that, radio changes status. It stops being a sealed industrial object. It becomes a mechanism you can reason about, vary, and build from.

Much later I found an obscure old Xilinx publication from roughly twenty years earlier describing an FM receiver along related lines, quiet input biasing, direct threshold behavior, no front-end sigma-delta feedback. That did not weaken the result. It strengthened it. It showed this direction was real, not fantasy, even if the mainstream story of radio ignored it.

So the one-pin FPGA FM receiver answered the only question that mattered:

How much radio do you actually need?

Less than the inherited stack tells you.

And that is exactly why I built it.