A Shader for Nano-FPGA Fabric
May 1, 2022

This note points to a GLSL shader used to render a nano-FPGA-style fabric. The artifact matters because the fabric is not only a diagram; it is a cell field whose roles, tiling, and local connections can be drawn by executable code.

Rendering the fabric in WebGL keeps the visual surface close to the machine model: every repeated tile has a role, a local neighborhood, and a place in the grid.

Shader artifactOriginally posted 2022-05-01; expanded here around the rendered fabric.

Related: Cartilage Nested-Instantiation Demo

Article focus: GLSL rendering, nano-FPGA tiling, visual roles, and inspectable local connections.

Current Mechanism

The current compact browser and hardware reference is Cartilage Core. Its public source repository places the single-file WebGL1 model beside a hardware paper, SystemVerilog RTL, and Verilator testbench, while keeping browser rendering evidence distinct from RTL clock behavior.

The Artifact

The linked demo was a GLSL rendering of a nano-FPGA fabric: a repeated cell field where the visual pattern is meant to expose local structure instead of hiding it behind a block diagram.

The important part is the executable surface. A shader can draw the repeated geometry, show tile roles, and make the fabric readable as a live grid rather than a static illustration.

Why Use a Shader

A fabric made from many local cells is hard to explain with a single schematic. WebGL is a useful medium because it can render the whole field while preserving repeated local detail.

That makes the renderer part of the engineering work. It is a way to inspect tiling, orientation, role encoding, and local connection rules at the scale where the machine actually exists.

What The Render Gives

The useful output is a stable visual grammar: repeated cells, roles, orientations, and neighborhood connections can be inspected, shared, and compared with later Cartilage renders.

Links From the Original Post