Elementary computation can be read as switching: choosing one path or value from alternatives under a condition.

That makes the CPU a built machine, not the primitive. Verilog and FPGA work make the lower structure visible: selection, state, wiring, timing, and parallel datapaths.

Boolean-logic noteOriginally posted 2022-04-27; expanded here around switching and selection.

Article focus: if-then-else, switching, Verilog, FPGA structure, and Boolean computation.

The Primitive

A CPU is a useful abstraction, but it is not where computation has to start. Underneath a processor are choices: select this value or that one, take this path or that path, update this state or preserve it.

The everyday programming form is if-then-else. The circuit form is switching and selection. A MUX is the physical version of that idea.

Why Verilog Helps

Verilog and FPGA work expose the structure that ordinary sequential code often hides. The builder has to think about registers, wires, fanout, clocks, routing, and parallel operations.

That does not make every problem simpler. It makes the machine shape visible enough to reason about timing and resources directly.

Cartilage Visual Language

The 32 Cartilage cell-role codes are a compact body-type alphabet: reconfiguration port, cross, constants, four wire orientations, and six MUX modes in four orientations. The Cartilage Visual Language article shows the rendered key and decodes all 32 codes.