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The following are projects (in the order of laser-sharp short term focus) we are working on (volunteer's help appreciated; early co-founder opportunities for creation of an invention that will be called "XXI century's Manhattan Project").

1. Emulation of arbitrary FPGA element size to pick the optimal number of D flip-flops, multiplexer networks, LUTs, and optimal SerDes bandwith for inter-node communication. An early prototype was written in GLSL and contained only 1 reconfigurable multiplexer as a unique hyper-fine-grained switching fabric. Turns out, we needed to control adjacent FPGA configurations in every node, and it need much more than one multiplexer, otherwise it's a waste of reconfiguration support circuits. No need to compute next state fast, because only physical chips can run the model fast and efficiently. The selection research is in works right now (I wish I had less ADHD), and it's a JavaScript Node.js app, emulating a small array of interconnected FPGAs controlled by special control plane overlay network we codename "Sinew".

2. Manufacturing of physical prototypes using stock FPGAs. We ran out of available chips. Were using flex PCB design that allows to cut compute fabric with scissors (iCE40LP384-SG32). Another was a high-bandwidth FIFO-rich iCE40HX1K-TQ144 (a nice scalable modular PCB design has been made; but these chips had disappeared as well).

3. Zones-managing virtual machine we codename "Cartilage". It runs on top of the emulator, or the stock FPGAs prototype, or the optimal element physical chip. It allows to implement reactive programming with automatic ports route management and contained objects instantiations, and dynamic types creation at run-time.

4. Distributed massively parallel programming language syntax. Didn't touch yet, but it seems in a close reach (perhaps this year, even!)