Three Boundary-Driven Cartilage MUX Lanes

June 26, 2026

Three selectors operate independently inside one 16x16 Cartilage fabric, turning nine edge inputs into the checked output pattern 1, 1, 0.

The run advances for 160 fabric cycles and records the circuit in a 2048x2048 render. Its manifest marks overlay names each lane, while the fabric itself carries selectors and data across the boundary.

Cartilage Core supplies the current mechanism; Cartilage 2026 and the visual-language decoder connect this run to the larger architecture.

See All Three MUX Lanes At Once

Three Cartilage MUX lanes with left-edge selectors, top false inputs, bottom true inputs, and right-edge outputs reading 1, 1, 0
Selectors enter from the left, false values from the top, true values from the bottom, and the three selected results emerge at the right.

Connect Boundary Transactions To Local Logic

The run drives values at named edge positions, routes them into three local MUX islands, and reads each selected value from the opposite edge.

The circuit makes the external transaction path concrete: boundary I/O reaches ordinary Cartilage roles, those roles compute locally, and the manifest checks the exposed results.

Use One Selector Equation In Three Places

Each 2:1 lane reads one selector, one false-side value, and one true-side value:

OUT0 = SEL0 ? T0 : F0
OUT1 = SEL1 ? T1 : F1
OUT2 = SEL2 ? T2 : F2

MUX Algebra develops this base form and shows how nesting selectors builds a LUT2 or a larger decision tree.

Independence gives each lane its own complete boundary-to-boundary path, so one fabric run exercises three selector choices in parallel.

Drive Nine Named Edge Values

The manifest assigns all three selectors and both data choices at explicit boundary positions:

SEL0@left4=1   F0@top5=0   T0@bottom5=1
SEL1@left8=0   F1@top9=1   T1@bottom9=1
SEL2@left12=1  F2@top13=1  T2@bottom13=0

Those selections produce three explicit output values:

OUT0@right4=1
OUT1@right8=1
OUT2@right12=0

Read The 1, 1, 0 Result At The Right Edge

The generated surface assertion records matching expected and observed values:

expected OUT0@right4=1, OUT1@right8=1, OUT2@right12=0
observed OUT0=1, OUT1=1, OUT2=0

Manifest drive mode advances the fabric through 160 cycles. The first edge readback exposes active selector positions on the left; the final readback exposes the asserted results on the right.

Decode The 16x16 Run At Full Resolution

The lattice contains 16x16 cells, and the PNG spans 2048x2048 pixels. The run identifies its originating path as cartilage-grid-rs/examples/external-mux-lanes.surface.qfg. This page carries the public input vector, output vector, cycle count, and render metadata.

Labels and translucent regions help the reader follow each lane. The Cartilage Visual Language decodes the installed roles beneath those overlays.

Scale The Boundary Path Into Larger Circuits

This three-lane run establishes the edge-driven selector pattern. Cartilage Core and its public source repository carry the same local-role architecture into the current compact browser and hardware implementation.

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