An FM Receiver With One FPGA Input Pin
April 24, 2026

Launch note for the one-pin FPGA FM receiver article.

Receiver article linkOriginally posted 2026-04-24. The full article gives the receiver path and the Verilog follow-up.

Included: the short publication text, source link, and link to the full writeup.

Full article: How Much Radio Do You Actually Need?

Original Post

I built an FM receiver with one FPGA input pin.

Not “one-chip radio.”
Not “a tiny SDR module.”

One input pin receives the RF.
The FPGA threshold turns it into a transition stream.
Four-phase sampling recovers quadrature structure.
XOR logic handles mixing.
A CIC filter downsamples.
A cross-product demodulator recovers FM.
Sigma-delta output produces audio.

What disappears?

No strong external local oscillator spraying around the board.
No conventional analog mixer front end.
No RF/IF amplitude-preserving ADC.
No sine/cosine lookup tables.
No atan2 phase extractor.

The question was not “can I make a toy FM receiver?”
The question was:

How much of radio is actually necessary?

Turns out: less than the inherited stack tells you.

Full technical article: How Much Radio Do You Actually Need?