The Loop
Modern photolithography is not only an optical exposure step. The printed wafer pattern depends on correction, simulation, mask generation, process knowledge, scanner behavior, and metrology. Those computations run on the same class of advanced chips that the process is trying to produce next.
That is the closed cycle worth noticing. A chip design can be open while the route from design to working silicon remains locked inside expensive tools, foundry recipes, proprietary process models, and scarce machine time. The manufacturing system becomes computational infrastructure, not just factory equipment.
The Access Boundary
ASML scanners, TSMC process windows, computational lithography, EDA tools, GPU compute, metrology, and packaging flows form one tightly coupled manufacturing system.
Open HDL and open layouts are valuable, but they do not open the whole loop. The printed device still depends on process models, mask correction, equipment calibration, restricted know-how, and enough compute to make the next process step work.
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Manufacturing Boundary
The useful constraint is not only transistor size. It is the whole path from layout to physical device: process, material, optics, mask correction, metrology, packaging, equipment limits, and who can repeat the result. That is why local or civic-scale active-device fabrication is a different problem from simply publishing a chip design.