Original Post

I made a simple estimate: it seems we're not doing cellular automata for a wrong reason. A fully pipelined FPGA chain, even at 16 nm node at 891 MHz has cell-to-cell latency over an array of 100 FPGAs (spanning over 3 meters) of just 0.113 milliseconds! Clocked pipelined signal travels at 95,000 kilometers per hour, which is more than enough for fast reaction time complex compute! So what a big deal supporting all these "span-N" wires and "fat tree" supercompute architectures?! Let's get back to mesh again?.. Please, let me know in the comments below \/ \/ \/ if I got it wrong. Seems that Intel 4 melting core with full pipeline has stopped the trend. Let's get it back on track, and redesign all our FPGAs, never worrying about timing closure ever again?

#networktopology #supercomputing #latency #fpgas