Three Levels of a New Programming System
April 6, 2022
A new computer architecture becomes usable when hardware, runtime, and language reinforce one another. Cartilage joins all three: a scalable fabric, a self-reprogramming object model, and a high-level syntax for distributed reactive programs.
That union turns two decades of operating-system and language work into a coherent path from silicon cells to application code.
Three Layers, One Machine
The hardware layer uses arrays of locally connected compute nodes. The middle layer manages objects, regions, ports, routing, and runtime reconfiguration. The language layer expresses dynamic types, reactive dataflow, hierarchy, and massive parallelism.
Work on Lattice iCE40LP384 and iCE40HX1K boards, Logisim models, ShaderToy renderings, and a JavaScript fabric emulator refined the required node size and showed why each node needs more than one fine-grained logic cell.
Build the Language the Fabric Invites
The resulting machine model removes the fixed boundary between application, runtime, and configured hardware. Programs can create structure, move responsibility, and reshape local computation as their needs change.
Language designers, FPGA engineers, and distributed-systems builders can help turn this three-level system into the programming environment that parallel hardware has demanded for decades.
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This stuff is so cool. Was trying to create a programming language for 20 years. To write an operating system from scratch. To reinvent the way computer works. Finally got both hardware and software sides together. There are three levels of abstraction: low-level silicon chips; middle-level self-reprogramming object-oriented model; high-level programming language with syntactic features.
On this weekend, I wrote an emulator of an FPGA array me and my colleagues kept working on since September 2020. We designed a flex PCB for Lattice iCE40LP384-SG32. They disappeared. We designed 4-layer PCB for Lattice iCE40HX1K-TQ144. They disappeared.
In September 2021, I wrote an emulator in Logisim and in ShaderToy. It worked. It showed that fine-grained FPGA is a waste, because each compute node has to serve as a container controller. It definitely has to have more than one logic cell.
This weekend, the idea showed to be not only neat and feasible, for the demanded array of FPGAs, but also hinted into an easy way to implement the middle-level self-reprogramming object-oriented model! I'm working on an emulator of it right now!
Next step, is to step-by-step follow most useful semantics and syntax, and generalize what is needed into the SILVER BULLET programming language we all kept dreaming about for more than 50 years!
It's a high-level. Distributed. Massively parallel. Homogeneous (not heterogeneous!) Dynamically typed. Reactive dataflow. Object-oriented. With first-class self-modification semantics.
It's coming. And it will definitely run on a VERY SPECIAL silicon hardware not found ANYWHERE IN THE WORLD.
We have invented a replacement for John von Neumann/Alan Turing CPU architecture. No more bottleneck + neat reactive features + infinite scalability (just add more hardware, and get superlinear speedup never ending!)
This stuff is so cool!
Comments added by Brian Greenforest on LinkedIn
These 3 comments were also preserved verbatim from Brian Greenforest’s LinkedIn data export or the public post page.
Comment 1 · (2022-04-06 03:00:26 UTC)
Glad to see your early interest! A new BREAKTHROUGH most exciting programming language of the last 100 years is definitely coming THIS YEAR (unless I'll go to a rabbit hole to polish the syntax!)
Douglas, you might be interested in taking a look at this tiny step disclosing a little bit more: https://www.linkedin.com/posts/ceannard_project-cartilage-the-open-hardware-part-activity-6921554089935847424-Zccp?utm_source=linkedin_share&utm_medium=member_desktop_web
Comments added by Brian Greenforest on LinkedIn
These 3 comments were also preserved verbatim from Brian Greenforest’s LinkedIn data export or the public post page.
Comment 1 · (2022-04-06 03:00:26 UTC)
View the LinkedIn post
Comment 2 · (2022-04-17 21:08:59 UTC)
View the LinkedIn post
Comment 3 · (2022-04-17 21:12:26 UTC)
View the LinkedIn post