CPUs Solve a Narrow Class of Problems
June 18, 2021

CPUs excel at sequential instruction streams, yet that model covers only a narrow part of the computation engineers need. It also forces complex systems through blocking calls, stacks, shared memory, and orchestration that hide the machine’s natural parallel structure.

Brian Greenforest presents FPGAs as a liberation tool: configurable Boolean systems that can express many relationships at once and create dynamic structure through connected fabrics.

General Computation Needs More Than an ISA

Yosys, Icarus Verilog, Verilator, Vivado, and modern FPGA devices let engineers define datapaths, state machines, protocols, and application logic directly. One FPGA can also configure another, enabling class-like instances inside a changing hardware system.

That structure offers a different way to manage complexity. Local components own state and connections instead of competing through one global instruction and memory model.

Open the Fabric and Grow the Ecosystem

The architecture raises a commercial choice about patents, licensing, and open source. Public documentation and defensive intellectual-property strategy can protect the inventor while inviting the ecosystem that a new machine needs.

FPGA vendors, tool builders, investors, and open-hardware developers can help carry this fabric into products. The opportunity combines a licensable architecture with a community-scale computing platform.

Originally posted on LinkedIn

Brian Greenforest · (2021-06-18 03:39:07 UTC)

Open the original LinkedIn post · LinkedIn activity 6811497465783701505

LinkedIn status when archived: Edited · Visible to anyone on or off LinkedIn.

CPUs and software are capable to solve only a NARROW class of computational problems, not only in terms of efficiency, but also in the management of COMPLEXITY. I honestly am puzzled, how did we allow Von Neumann and Co. (TM) to fool us for almost 100 years that software is somewhat more general and even more fun than hardware. FPGAs are not just the future, they are the best liberation tool for engineers who are "stuck" in the sequential world of BLOCKING function calls. FPGAs attached to other FPGAs inspire us, that we can have DYNAMIC class instances even inside otherwise "rigid" hardware logic. I am thinking about licensing the FPGA fabric I've developed the last March. Should the IP be proprietary or open source? Should I patent it first? What should I do??? Feeling lost...

Comments added by Brian Greenforest on LinkedIn

These 9 comments were also preserved verbatim from Brian Greenforest’s LinkedIn data export or the public post page.

Hi, Rob! I totally agree with you, but I have to patent first, right? Otherwise, what if someone will patent it, and then sue the open source foundation, right?..

View the LinkedIn post

Rob, unfortunately not after the America Invents Act, signed by Barack Obama on 16 September 2011.

View the LinkedIn post

Rob, "practitioners are cautioned against interpreting “disclosure” in the AIA as replacing a patent application filing; publishing is not a substitute for filing to obtain a strong patent position on the invention. An inventor who has publicly disclosed should file a patent application promptly or, better yet, before disclosure. Why? Because, a mere public disclosure will never provide an effective filing date. Moreover, even assuming a statutory exception can be established under § 102(b)(2) for the prior disclosure, that prior disclosure arguably protects a claimed invention only against anticipatory subject matter, not against obvious variants." https://www.finnegan.com/en/insights/articles/top-five-dangers-for-the-aia-unwary.html

View the LinkedIn post

Rob, OSHA had problems just recently: "The Open Source Hardware Association has been concerned about developments in respect of design patents. The Association has called for a balanced approach to the protection of design patents. Limor Fried and Adafruit have called patent law reform – particularly in respect of software and hardware patents. In the meantime, the company has sought to engage in defensive patenting as part of a networked effort to ward off patent trolls. The Open Source Hardware Association has also intervened as an amicus curiae in patent disputes over 2D printing. Limor Fried and Adafruit have demonstrated the important role of the Open Source Hardware movement in lobbying for IP law reform." https://osf.io/p2qka/download/?format=pdf

View the LinkedIn post

I'd LOVE to! But I don't want to let patent trolls to file a patent for my invention and STEAL it from community!

View the LinkedIn post

Ed, I admire your metal argument, and totally agree on how much pain lack of tools and methodology can cause. Finally, in 21 century, we have YosysHQ, Ikarus Verilog, Verilator. Vivado does its job much better than GTKWave on large data. Rewriting bitstream of an FPGA takes milliseconds. We are adopting the same fun approach Webpack has for JavaScript world to facilitate hands on learning and iterative incremental design. The premature optimization of microprocessors has promoted software as panacea which is not. Software burned trillions of hours and dollars (although gave us back an insane amount of progress, of course!) But the price we have payed for premature optimization is insanely high. The cognitive overload of a jumping instruction pointer even in object-oriented software makes the dream of code reuse in software a silly idea. It works for small components, but fails for anything of meaningful size. Then, Haskell community has invented FRP. And started to promote the idea of reactive programming to masses, as an idea that you don't have to manually keep recomputing a lot of stuff in reactive systems. Then hundreds of millions of programmers kept writing PARALLEL MULTI-THREADED CODE! Boolean logic had it always.

View the LinkedIn post

Ed Hartley let me clarify: back in the '70s clever CPU designers have liberated folk from the need to design custom digital circuits for many years. Now that problem is back, there is no way to avoid LEARNING how to build scalable and simple to maintain reusable Verilog components. CPUs are not a solution anymore. And, as I mentioned, they are pretty bad at NP-complete stuff...

View the LinkedIn post

The purpose of FPGA is to teach you to make ASICs.

View the LinkedIn post

Rob, thank you for the advice! Very reasonable: a hard work of documenting ideas is a must. Fees in the US are not modest, especially when it's necessary to defend things. I have heard today that public allocates grants for nonprofits who provide free lawyers for everyone doing open source, to defend from patent trolls first. After that first layer of defense works (government vs. mid-budget trolls), it's possible to defend poor open HW people with government vs. high-budget corporations. Such a great hack using nonprofits! :-)

View the LinkedIn post